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15/07/2014 by Kvaser

Kvaser makes an FPGA-based CAN FD controller available for testing

Kvaser has developed a new CAN with Flexible Data-Rate (CAN FD) controller in a step towards providing CAN FD compatible CAN interfaces and dataloggers in its product range. As the standard is yet to be ratified, the device has been implemented as an FPGA so that the firmware can be updated as the standard develops. The FPGA will be made available to companies who would like to partner to provide Kvaser-compatible software for the new standard.

CAN FD increases CAN data throughput by increasing the number of bytes in each CAN-frame (from 8 to 64 bytes), making the CAN-frames longer. To compensate, CAN FD enables data to be sent at a higher bit-rate. When building CAN FD systems and sub-systems, the higher bit-rate demands that more information is known about the physical layer. For example, CAN FD messages demand a common Time Quanta and that the location of the sampling point be known. Kvaser has implemented additional functions into its CAN FD controller logic that can be used to provide information on how to configure the CAN bits to maximise bit-rate in existing CAN bus layouts.

Today, Kvaser’s FPGA controller can be used to perform high speed sampling of the CAN / CAN FD bus, including detection of short glitches that are normally filtered out by CAN logic. Such glitches provide an early warning of potential problems in the CAN bus communication. The CAN message’s high resolution also facilitates precise location of every edge in the CAN-frame – information that can be analysed to find out the oscillator tolerance of the sender.

Kvaser has also implemented a special pattern in the idle phase of the CAN-communication that enables distance (in nanoseconds) to be measured from the test unit to the unit sending the next CAN-frame. This measurement will simultaneously provide information about the Time Quanta in the received CAN frame.

A drawback with CAN FD is that all legacy CAN controllers will send an Error-Frame as soon as they detect a CAN FD frame at the CAN bus. During robustness testing of Legacy CAN, we found that patterns or glitches in the propagation part of the bit will be ignored. This feature can be used to place additional information in the propagation segment of the legacy CAN-bits. This was presented at the 2013 ICC in Paris as the CAN EF solution, an intermediate solution between legacy CAN and CAN FD that is compatible with both (please follow this link to find out more about CAN EF).

Comments Kent Lennartsson, Kvaser’s hardware manager: “Kvaser is committed to releasing CAN FD products as soon as CAN FD microcontrollers and a conformance test solution for the new standard become available. The FPGA came about because we recognise that software partners need CAN FD test hardware for evaluation and diagnostic purposes before the standard has been ratified.”

For more information on Kvaser’s CAN FD FPGA controller, please contact Kent directly at kl@kvaser.com